Efficient Processing of Deep Neural Networks

Vivienne Sze, MIT
Yu-Hsin Chen, MIT
Tien-Ju Yang, MIT
Joel S. Emer, MIT and Nvidia Research

This book includes background on DNN processing; a description and
taxonomy of hardware architectural approaches for designing DNN
accelerators; key metrics for evaluating and comparing different designs; features of the DNN processing that are amenable to hardware/algorithm co-design to improve energy efficiency and throughput; and
opportunities for applying new technologies. Readers will find a structured introduction to the field as well as a formalization and organization of key concepts from contemporary works that provides insights that may
spark new ideas.
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