Shared Data in Asymmetric Multiprocessing (AMP) Configurations

What is Asymmetric MultiProcessing (AMP)?

Heterogeneous multicore systems are becoming ever more popular for automotive and industrial applications due to their high performance and energy efficiency. Heterogeneous systems have two or more cores with different instruction set architectures with more than one operating system running on the device. By dividing tasks between different processors, heterogeneous system designs cover multiple requirements such as energy efficiency, performance and safety, and make them fit for real-time critical applications.

This architecture is known as Asymmetric Multiprocessing (AMP). An AMP system has multiple CPUs, each of which may be a different architecture (but can be the same). Each CPU has its own address space (though some of the memory may be shared with other cores). The system is typically equipped with a communication facility between the CPUs, normally a hardware messaging unit and DDR shared memory. In addition, more than one operating system runs independently on one or more processors with different architectures. For example, NXP i.MX8x with embedded Linux on the ARM Cortex-A and FreeRTOS or Vector’s MicroSAR on the ARM Cortex-M4.

A growing need

The need for a real-time storage system in applications that utilize AMP hardware is quite wide-spread: power grid controllers must share their sensor readings and other real-time data collected by a FreeRTOS-based low-latency application running atop of the Cortex-M clusters with the fast yet complex processing on the Linux side running atop of the Cortex-A clusters; an AMP-based drone system utilizes different clusters for navigation parameters acquisition and for real-time processing running different real-time operating systems on each cluster.

To learn more about this topic we invite you to review the white paper, Shared Data in Asymmetric Multiprocessing (AMP) Configurations.

Open the White Paper:

Sponsored by McObject.

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